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NXP  74LVC1G07GW,125  Buffer, 74LVC1G07, 1.65 V to 5.5 V, TSSOP-5

NXP 74LVC1G07GW,125
Technical Data Sheet (348.69KB) EN See all Technical Docs

Image is for illustrative purposes only. Please refer to product description.

Product Overview

The 74LVC1G07GW,125 is a non-inverting Buffer with open-drain output. The open drain output can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. Inputs can be driven from either 3.3/5V devices. This feature allows the use of this device in a mixed 3.3 and 5V environment. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
  • High noise immunity
  • CMOS low power consumption
  • Direct interface with TTL levels
  • Complies with JEDEC standard
  • 5V Tolerant input/output for interfacing with 5V logic
  • Latch-up performance exceeds 250mA
  • Inputs accept voltages up to 5V

Product Information

Logic Family / Base Number:
74LVC1G07
Logic Device Type:
Buffer, Non Inverting
Logic Case Style:
TSSOP
No. of Pins:
5Pins
Supply Voltage Min:
1.65V
Supply Voltage Max:
5.5V
Logic IC Family:
74LVC
Logic IC Base Number:
741G07
Operating Temperature Min:
-40°C
Operating Temperature Max:
125°C
Packaging:
Cut Tape
Product Range:
-
Automotive Qualifications Standard:
-
MSL:
MSL 1 - Unlimited
SVHC:
No SVHC (17-Dec-2015)

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Applications

  • Industrial;
  • Automation & Process Control;
  • Signal Processing;
  • Automotive

Legislation and Environmental

Moisture Sensitivity Level:
MSL 1 - Unlimited
RoHS Compliant:
Yes
Authorized Distributor

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