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Quantity | Price |
---|---|
1+ | $3.330 |
10+ | $3.080 |
25+ | $2.940 |
50+ | $2.900 |
100+ | $2.870 |
250+ | $2.770 |
500+ | $2.700 |
Product Information
Product Overview
CY7C1021DV33-10ZSXIT is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking chip enable (active-low CE) and write enable (active-low WE) inputs LOW. Reading from the device is accomplished by taking chip enable (active-low CE) and output enable (active-low OE) LOW while forcing the write enable (active-low WE) HIGH. The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when the device is deselected (active-low CE HIGH), the outputs are disabled (active-low OE HIGH), the active-low BHE and active-low BLE are disabled (active-low BHE, active-low BLE HIGH), or during a write operation (active-low CE LOW, and active-low WE LOW).
- Pin-and function-compatible with CY7C1021CV33
- High speed, tAA=10ns
- VCC Operating supply current is 60mA max at 100MHz, VCC=Max, IOUT=0mA, f=fMAX=1/tRC
- Automatic CE power-down current-CMOS inputs is 3mA
- Data retention at 2.0V
- Automatic power-down when deselected, independent control of upper and lower bits
- CMOS for optimum speed and power
- Vcc is 3.3V ±0.3V
- 44-pin TSOP Type II package
- Industrial ambient temperature range from -40°C to +85°C
Technical Specifications
1Mbit
64K x 16bit
3V to 3.6V
TSOP-II
44Pins
3V
3.3V
Surface Mount
85°C
MSL 3 - 168 hours
Asynchronous SRAM
1Mbit
64K x 16bit
TSOP-II
10ns
3.6V
-
-40°C
-
No SVHC (21-Jan-2025)
Technical Docs (2)
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