Print Page
MT53E256M32D2FW-046 AUT:B
DRAM, Mobile LPDDR4, 8 Gbit, 256M x 32bit, 2.133 GHz, TFBGA, 200 Pins
Image is for illustrative purposes only. Please refer to product description.
ManufacturerMICRON
Manufacturer Part NoMT53E256M32D2FW-046 AUT:B
Newark Part No.80AH8373
Technical Datasheet
500 In Stock
Need more?
Same day shipping
Order before 9pm EST standard shipping
Available in quantity shown. To order more than shown inventory, contact sales
| Quantity | Price |
|---|---|
| 1+ | $34.250 |
| 5+ | $32.500 |
| 10+ | $30.720 |
| 25+ | $28.920 |
| 50+ | $26.970 |
| 100+ | $26.390 |
| 250+ | $25.520 |
Price for:Each
Minimum: 1
Multiple: 1
$34.25
Line Note
Added to your Order Confirmation, Invoice, and Dispatch note for this order only.
This number will be added to the Order Confirmation, Invoice, Dispatch note, Web confirmation Email and Product Label.
Product Information
ManufacturerMICRON
Manufacturer Part NoMT53E256M32D2FW-046 AUT:B
Newark Part No.80AH8373
Technical Datasheet
DRAM TypeMobile LPDDR4
DRAM Density8Gbit
Memory Density8Gbit
DRAM Memory Configuration256M x 32bit
Memory Configuration256M x 32bit
Clock Frequency2.133GHz
Clock Frequency Max2.133GHz
IC Case / PackageTFBGA
Memory Case StyleTFBGA
No. of Pins200Pins
Supply Voltage Nom1.1V
Access Time468ps
IC MountingSurface Mount
Operating Temperature Min-40°C
Operating Temperature Max125°C
Product Range-
SVHCNo SVHC (17-Jan-2023)
Product Overview
MT53E256M32D2FW-046 AUT:B is a 4Gb mobile low-power DDR4 SDRAM with low VDDQ. It is a high-speed CMOS, dynamic random-access memory. This memory is internally configured with x16 I/O, 8-banks. Each of the x16’s 536,870,912-bit banks are organized as 32,768 rows by 1024 columns by 16bits. It has directed per-bank refresh for concurrent bank operation and ease of command scheduling. This memory has on-chip temperature sensor to control self refresh rate. It has clock-stop capability.
- Operating voltage range is 1.10V (VDD2)/0.60V or 1.10V (VDDQ)
- 256Meg x 32 configuration, =LPDDR4, 2die addressing, B design
- Packaging style is 200-ball TFBGA
- Cycle time is 468ps at RL = 36/40, partial-array self refresh (PASR)
- Operating temperature range is –40°C to +125°C, automotive qualified
- Clock rate is 2133MHz, data rate per pin is 4266Mb/s
- Ultra-low-voltage core and I/O power supplies
- 16n prefetch DDR architecture, 8 internal banks per channel for concurrent operation
- Single-data-rate CMD/ADR entry, bidirectional/differential data strobe per byte lane
- Programmable READ and WRITE latencies (RL/WL), selectable output drive strength (DS)
Technical Specifications
DRAM Type
Mobile LPDDR4
Memory Density
8Gbit
Memory Configuration
256M x 32bit
Clock Frequency Max
2.133GHz
Memory Case Style
TFBGA
Supply Voltage Nom
1.1V
IC Mounting
Surface Mount
Operating Temperature Max
125°C
SVHC
No SVHC (17-Jan-2023)
DRAM Density
8Gbit
DRAM Memory Configuration
256M x 32bit
Clock Frequency
2.133GHz
IC Case / Package
TFBGA
No. of Pins
200Pins
Access Time
468ps
Operating Temperature Min
-40°C
Product Range
-
Technical Docs (1)
Legislation and Environmental
US ECCN:Unknown
EU ECCN:Unknown
RoHS Compliant:Yes
RoHS
RoHS Phthalates Compliant:Yes
RoHS
SVHC:No SVHC (17-Jan-2023)
Download Product Compliance Certificate
Product Compliance Certificate