Quantité | Prix |
---|---|
1+ | 53,700 $ |
5+ | 50,130 $ |
10+ | 46,560 $ |
25+ | 44,160 $ |
50+ | 41,790 $ |
100+ | 39,400 $ |
Informations produit
Aperçu du produit
ADRF6821 is a highly integrated, dual radio frequency (RF) input, zero intermediate frequency (IF)/low IF RFIC receiver with a quadrature demodulator, digital step attenuator (DSA), IF linear amplifiers, an integrated, fractional-N phase-locked loop (PLL), and a low phase noise, multicore, voltage controlled oscillator (VCO). The RFIC is ideally suited for communication digital predistortion (DPD) systems. The high isolation 2:1RF switch and on-chip wideband RF balun enable the device to support two single-ended, 50 ohm terminated RF inputs. A programmable attenuator ensures an optimal differential RF input level to the high linearity demodulator core. The integrated attenuator offers an attenuation range of 15dB with a step size of 1dB. It is used in application like cellular W CDMA/GSM/LTE, DPD receivers, microwave, point to point radios etc.
- DPD receiver with integrated fractional-N PLL
- RF input frequency range is 450MHz to 2800MHz
- Internal LO input frequency range is 450MHz to 2800MHz
- Dual RF inputs with SPDT absorptive RF switches
- Integrated VCO to cover complete RF input range
- Digital programmable LO phase offset and dc nulling
- Programmable via 4-wire SPI
- Operating temperature is -40°C to +105°C
- Package style is 56-lead lead frame chip scale [LFCSP]
Remarques
ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party
Spécifications techniques
450MHz
3.1V
LFCSP-EP
-40°C
-
No SVHC (21-Jan-2025)
2.8GHz
3.5V
56Pins
105°C
MSL 3 - 168 hours
Documents techniques (1)
Législation et Questions environnementales
RoHS
RoHS
Certificat de conformité du produit