CY7C1021DV33-10VXIT

CY7C1021DV33-10VXIT is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking Chip Enable (active-low CE) and Write Enable (active-low WE) inputs LOW. If Byte Low Enable (active-low BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A15). If Byte High Enable (active-low BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A15). Reading from the device is accomplished by taking Chip Enable (active-low CE) and Output Enable (active-low OE) LOW while forcing the Write Enable (active-low WE) HIGH. If Byte Low Enable (active-low BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7.

• 2.0V data retention, automatic power-down when deselected
• CMOS for optimum speed/power
• Independent control of upper and lower bits
• Fast Asynchronous SRAM family, 1Mbit density, data width × 16bits
• 90nm technology, 3V to 3.6V voltage range, 10ns speed
• Input leakage current is +1µA maximum at (GND < VI < VCC)
• VCC operating supply current is 60mA max at (VCC = max, IOUT = 0mA, f = fMAX = 1/tRC, 100MHz)
• Input capacitance is 8pF maximum at (TA = 25°C, f = 1MHz, VCC = 3.3V)
• Pin-and function-compatible with CY7C1021CV33
• Industrial ambient temperature range from -40°C to +85°C, 44-pin molded SOJ package