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Quantité | Prix |
---|---|
1+ | 55,560 $ |
5+ | 54,390 $ |
10+ | 53,460 $ |
25+ | 52,840 $ |
50+ | 52,240 $ |
100+ | 51,660 $ |
Informations produit
Aperçu du produit
CY7C1069G30-10ZSXI is a 16Mbit (2M words × 8 bit) dual chip enable high-performance CMOS fast static RAM with error-correcting code (ECC). To write to the device, take chip enables (active-low CE1 LOW and active-low CE2 HIGH) and write enable (active-low WE) input LOW. To read from the device, take chip enables (active-low CE1 LOW and active-low CE2 HIGH) and output enable (active-low OE) LOW while forcing the write enable (active-low WE) HIGH. All I/Os (I/O0 through I/O7) are placed in a high impedance state when the device is deselected (active-low CE1 HIGH or active-low CE2 LOW), and control signals are de-asserted (active-low CE1 / active-low CE2, active-low OE, active-low WE).
- Embedded error-correcting code (ECC) for single-bit error correction
- Low active current ICC is 90mA typical at 100MHz
- Low standby current ISB2 is 20mA typical
- 1.0V data retention
- Transistor-transistor logic (TTL) compatible inputs and outputs
- ERR pin to indicate 1-bit error detection and correction
- 2.2V to 3.6V voltage range
- High speed, tAA=10ns
- 54-pin TSOP II package
- Industrial ambient temperature range from -40°C to +85°C
Spécifications techniques
Asynchronous SRAM
2M x 8bit
2.2V to 3.6V
TSOP-II
54Pins
10ns
-
Surface Mount
85°C
MSL 3 - 168 hours
16Mbit
16Mbit
2Mword x 8bit
TSOP-II
2.2V
3.6V
-
-40°C
-
No SVHC (21-Jan-2025)
Documents techniques (1)
Législation et Questions environnementales
RoHS
RoHS
Certificat de conformité du produit