MT29F2G08ABBEAH4-IT:E

MT29F2G08ABBEAH4 is a NAND flash memory. This NAND flash device include an asynchronous data interface for high-performance I/O operations. This device use a highly multiplexed 8-bit bus (I/Ox) to transfer commands, address, and data. There are five control signals used to implement the asynchronous data interface: CE#, CLE, ALE, WE#, and RE#. Additional signals control hardware write protection and monitor device status (R/B#). This hardware interface creates a low pin-count device with a standard pinout that remains the same from one density to another, enabling future upgrades to higher densities with no board redesign. A target is the unit of memory accessed by a chip enable signal. A target contains one or more NAND Flash die. A NAND Flash die is the minimum unit that can independently execute commands and report status. A NAND Flash die, in the ONFI specification, is referred to as a logical unit (LUN). There is at least one NAND Flash die per chip enable signal.

• Single-level cell (SLC) technology, asynchronous I/O performance, array performance
• Erase block is 700µs (typical), command set is ONFI NAND flash protocol
• Advanced command set, one-time programmable (OTP) mode
• Operation status byte provides software method for detecting, operation completion
• First block (block address 00h) is valid when shipped from factory with ECC
• Block 0 requires 1-bit ECC if PROGRAM/ERASE cycles are less than 1000
• RESET (FFh) required as first command after power-on, quality and reliability
• 2Gb density, 8bit device width, SLC level
• 1.8V (1.7–1.95V) operating voltage, asynchronous interface
• 63-ball VFBGA package, industrial operating temperature range from -40°C to 85°C