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                    • New Deals
                      1. Home
                      2. Semiconductors - ICs
                      3. GALs / PALs & SPLDs
                      4. CPLDs
                      Print Page

                      LC4064V-75TN48C

                      CPLD, 64 Macrocells, 32 I/O's, TQFP, 48 Pins

                      LATTICE SEMICONDUCTOR LC4064V-75TN48C
                      Image is for illustrative purposes only. Please refer to product description.
                      ManufacturerLATTICE SEMICONDUCTOR
                      Manufacturer Part NoLC4064V-75TN48C
                      Newark Part No.55AJ0848
                      Technical Datasheet

                      Data Sheet

                      See all Technical Docs
                      1,946 In Stock

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                      Order before 9pm EST standard shipping
                      QuantityPrice
                      1+$7.350
                      10+$7.350
                      25+$7.350
                      50+$7.350
                      100+$7.350
                      Price for:Each
                      Minimum: 1
                      Multiple: 1
                      $7.35
                      Enter Your Part No/Line Note
                      Added to your Order Confirmation, Invoice, and Dispatch note for this order only.
                      This number will be added to the Order Confirmation, Invoice, Dispatch note, Web confirmation Email and Product Label.

                      Product Information

                      ManufacturerLATTICE SEMICONDUCTOR
                      Manufacturer Part NoLC4064V-75TN48C
                      Newark Part No.55AJ0848
                      Technical Datasheet

                      Data Sheet

                      CPLD Type-
                      No. of Macrocells64Macrocells
                      No. of I/O's32I/O's
                      No.of User I/Os32I/O's
                      IC Case / PackageTQFP
                      Logic Case StyleTQFP
                      No. of Pins48Pins
                      Speed Grade-
                      Frequency400MHz
                      Process Technology-
                      Supply Voltage Min3V
                      IC MountingSurface Mount
                      Supply Voltage Max3.6V
                      Propagation Delay7.5ns
                      Operating Temperature Min0°C
                      Global Clock Setup Time4.5ns
                      Operating Temperature Max90°C
                      Product Range-
                      Qualification-
                      MSLMSL 3 - 168 hours
                      SVHCNo SVHC (21-Jan-2025)

                      Product Overview

                      The LC4064V-75TN48C is a high performance SuperFAST CPLD consist of multiple 32-I/O, 64-macrocell. Output Routing Pools (ORPs) connect the GLBs to the I/O Blocks (IOBs), which contain multiple I/O cells. The ispMACH 4000 family is a blend of Lattice's two most popular architectures, the ispLSI® 2000 and ispMACH 4A. Retaining the best of both families, the ispMACH 4000 architecture focuses on significant innovations to combine the highest performance with low power in a flexible CPLD family. This family combines high speed and low power with the flexibility needed for ease of design. With its robust global routing pool and output routing pool, this family delivers excellent first-time-fit, timing predictability, routing, pin-out retention and density migration. It has enhanced system integration capabilities. Also offers enhanced I/O features such as slew rate control, PCI compatibility, bus-keeper latches, pull-up resistors, pull-down resistors, open drain outputs and hot socketing.

                      • tPD = 2.5ns propagation delay
                      • Up to four global clock pins with programmable clock polarity control
                      • Up to 80 PTs per output
                      • Enhanced macrocells with individual clock, reset, preset and clock enable controls
                      • Up to four global OE controls
                      • Individual local OE control per I/O pin
                      • Excellent First-Time-Fit ™ and refit
                      • Fast path, SpeedLocking™ Path and wide-PT path
                      • Wide input gating (36 input logic blocks) for fast counters, state machines and address decoders
                      • Low power - 1.8V core low dynamic power
                      • Superior solution for power sensitive consumer applications
                      • 5V Tolerant I/O for LVCMOS 3.3, LVTTL and PCI interfaces
                      • Hot-socketing
                      • Open-drain capability
                      • Input pull-up, pull-down or bus-keeper
                      • Programmable output slew rate
                      • 3.3V PCI compatible
                      • IEEE 1149.1 boundary scan testable
                      • 3.3/2.5/1.8V In-System Programmable
                      • (ISP™) Using IEEE 1532 compliant interface
                      • I/O pins with fast setup path

                      Technical Specifications

                      CPLD Type

                      -

                      No. of I/O's

                      32I/O's

                      IC Case / Package

                      TQFP

                      No. of Pins

                      48Pins

                      Frequency

                      400MHz

                      Supply Voltage Min

                      3V

                      Supply Voltage Max

                      3.6V

                      Operating Temperature Min

                      0°C

                      Operating Temperature Max

                      90°C

                      Qualification

                      -

                      SVHC

                      No SVHC (21-Jan-2025)

                      No. of Macrocells

                      64Macrocells

                      No.of User I/Os

                      32I/O's

                      Logic Case Style

                      TQFP

                      Speed Grade

                      -

                      Process Technology

                      -

                      IC Mounting

                      Surface Mount

                      Propagation Delay

                      7.5ns

                      Global Clock Setup Time

                      4.5ns

                      Product Range

                      -

                      MSL

                      MSL 3 - 168 hours

                      Technical Docs (1)

                      Technical Data Sheet EN

                      Legislation and Environmental

                      US ECCN:EAR99
                      EU ECCN:Unknown
                      RoHS Compliant:Yes

                      RoHS

                      RoHS Phthalates Compliant:Yes

                      RoHS

                      SVHC:No SVHC (21-Jan-2025)
                      Download Product Compliance Certificate

                      Product Compliance Certificate

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