MC14044BDR2G
Latch, MC14044, SR, Tri State, 175 ns, SOIC
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| Packaging Type | Quantity | Unit Price: | Total |
|---|---|---|---|
| Re-Reel | 1 | $0.865 | $0.86 |
| Total Price | $0.86 | ||
| Quantity | Price |
|---|---|
| 1+ | $0.865 |
| 50+ | $0.638 |
| 100+ | $0.572 |
| 250+ | $0.541 |
| 500+ | $0.530 |
| 1000+ | $0.520 |
| 2500+ | $0.508 |
| 5000+ | $0.498 |
Product Information
Product Overview
The MC14044BDR2G is a quad R-S Latch constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three-state buffers having a common enable input. The outputs are enabled with a logical 1 or high on the enable input, a logical 0 or low disconnects the latch from the Q outputs, resulting in an open circuit at the Q outputs. The outputs are capable of driving two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range. This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
- Double diode input protection
- Three-state outputs with common enable
Technical Docs (3)
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