CY7C1041G30-10ZSXI

CY7C1041G30-10ZSXI is a high-performance CMOS fast static RAM device with embedded ECC. It includes an ERR pin that signals an error detection and correction event during a read cycle. Data writes are performed by asserting the chip enable (active-low CE) and write enable (active-low WE) inputs LOW, while providing the data on I/O0 through I/O15 and address on A0 through A17 pins. Data reads are performed by asserting the chip enable (active-low CE) and output enable (active-low OE) inputs LOW and providing the required address on the address lines. The detection and correction of a single-bit error in the accessed location is indicated by the assertion of the ERR output (ERR=HIGH).

• Embedded ECC for single-bit error correction
• Active current ICC is 38mA typical
• Standby current ISB2 is 6mA typical
• 1.0V data retention
• TTL-compatible inputs and outputs
• Error indication (ERR) pin to indicate 1-bit error detection and correction
• 2.2V to 3.6V voltage range
• High speed, tAA=10ns
• 44-pin TSOP II package
• Industrial ambient temperature range from -40°C to +85°C