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Disponible sur commande
Délais d’approvisionnement standard du fabricant : 5 semaine(s)
Informations produit
FabricantSYSTEM LEVEL SOLUTIONS
Réf. FabricantIPRI2CCMFP001
Code Commande68R2435
Fiche technique
Software ApplicationIP CORE, Interface and Protocols, I2C
Core ArchitectureFPGA
Core Sub-ArchitectureCyclone, Stratix
Supported FamiliesCyclone, Cyclone II, Cyclone III, Stratix
Licence Model-
FeaturesMulti Master Operation, Software Programmable Clock Frequency, Bus Busy Detection
Product Range-
SVHCTo Be Advised
Aperçu du produit
- I2C controller IP core
- Compatible with Philips I2C(PCF 8584) standard
- Automatic detection and adoption to bus interface type
- Byte by byte data transfer is driven by Interrupt or bit polling
- Arbitration lost interrupt with automatic transfer cancellation
- Start/stop/repeated start/acknowledge generation
- Start/stop/repeated start detection
- Bus busy detection and static synchronous design
- Operates from wide range of input clock frequencies
Contenu
I2C controller encrypted core, UP3 1C6 reference design board, Simulation library for Altera-Modelsim v6.3g_p1, Nios II sample application, Drivers, Documentation.
Remarques
IP integration support available with the purchase of full version, additional support on chargeable basis for 3 months or more and core modification support available at additional cost.
Spécifications techniques
Software Application
IP CORE, Interface and Protocols, I2C
Core Sub-Architecture
Cyclone, Stratix
Licence Model
-
Product Range
-
Core Architecture
FPGA
Supported Families
Cyclone, Cyclone II, Cyclone III, Stratix
Features
Multi Master Operation, Software Programmable Clock Frequency, Bus Busy Detection
SVHC
To Be Advised
Documents techniques (1)
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Législation et Questions environnementales
US ECCN:Unknown
EU ECCN:Unknown
Conforme RoHS :Non applicable
Conforme à la norme RoHS Phthalates:Non applicable
SVHC :To Be Advised
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